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kristenday
 Post subject: Senior RFIC Systems Engineer
Posted: Thu Mar 10, 2011 3:45 pm 
 
Lieutenant

Joined: Tue Mar 08, 2011 6:07 pm
Posts: 3
Freescale Semiconductor
Tempe, AZ

Please apply online: freescale.com/careers
and apply for position #11774713
or email resume to: kristen.day@freescale.com

Candidate will be expected to cover multiple aspects of SoC systems engineering including system (and block) definition and analysis and test/debug of RF Transceivers and Wireless IP. Candidate will be expected to be engaged in the definition phase through the back end after the platform is out of the FAB. Candidate will be expected to effectively communicate and work with other co-located and remotely located teams. The candidate will be expected to effectively work with and support all other facets of the operations (such as PM, Arch., PE/TE, Mkt./Apps. and S/W).

-BS, MS or PhD in Electrical Engineering.
- Minimum of 10 years of experience in the Wireless/Semiconductor industry.
- Experience in system level architecture, definition and analysis and test of RF Transceivers and Wireless SoC’s in particular spread spectrum and OFDM based radio.
- Good written and oral communication and teamwork skills.
- Experience in RF/analog design including layout, fabrication, validation/testing and application for Wireless Transceiver and SoC ICs.
- Experience with SoC layout (floor planning).
- Experience with IC design of RF Transceivers and SoC’s for cellular or WPAN.
- Experience with design for testability of RF Transceivers and SoC’s.
- Hands on laboratory experience and ability to use RF, Analog and Digital Measurement equipment.
- Experience in CMOS, and RFCMOS technology transceiver and SoC design.
- Knowledge/experience in developing FPGA platform for pre-silicon verification and/or S/W development.
- Knowledge/experience in uP and memory subsystems.
- Knowledge/experience of radio communications, digital communications and H/W accelerators.
- Knowledge/experience in cellular or WPAN protocols, specifications and testing to specification limits.
- Knowledge/experience in designing with 0.18um and 90nm IC process technologies.
- Knowledge/experience in using Matlab and SPW.
- Knowledge/experience in using and developing LabView for testing.
- Knowledge of Cadence design tools.




Posted  11/12/2012

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